1. Field of the Invention
The present invention relates to a clock generation circuit and, more particularly, to a clock generation circuit that is used in a base station apparatus in a mobile communication system to generate a clock on the basis of a pulse signal from a GPS (Global Positioning System).
2. Description of the Prior Art
A system that detects its own position by using a GPS (Global Positioning System) has been available. This GPS transmits a pulse signal having an accurate period of, e.g., 1 pulse/sec. Some base station devices in a mobile communication system use a clock generation circuit for receiving a pulse signal from the GPS through a GPS receiver and generating an accurate clock on the basis of a reference signal output from the GPS receiver.
Such a clock generation circuit often incorporates redundant clock generation units to improve the reliability. More specifically, the clock generation circuit includes an active unit in use and a standby unit as an auxiliary unit having the same arrangement as that of the active unit.
Such a conventional clock generation circuit having this redundant arrangement has the function of performing free-running operation upon detecting that the GPS receiver of the active unit has stopped outputting a reference signal. In this free-running operation, a clock is internally generated and output without using any pulse signal from the GPS. This function is provided because the levels of pulse signals input to the GPS receiver vary depending on the installation conditions for the GPS antenna and the like, and the GPS receiver may stop outputting a reference signal when the signal level drops to too low a level.
In the prior art, even when such free-running operation is activated, the clock generation unit to be used is not autonomously switched from the active unit to the standby unit, but is switched from the active unit to the standby unit by the operator regardless of the presence/absence of a reference signal from the standby unit.
The following problems are, however, posed in the prior art described above.
The accuracy of the clock internally generated in the standby unit during free-running operation is limited, and the phase shift between the clock generated in the free-running operation and the accurate clock gradually increases. The first problem is that a clock which exceeds a phase difference allowed in other circuits, e.g., the transmitter and the receiver, which use a clock from the clock generation circuit may be supplied because of the phase shift of the output clock produced in the free-running operation. Such a problem arises because this circuit has no means for autonomously switching to the standby unit in spite of the fact that the standby unit has a normal reference signal.
The second problem is that switching from the active unit to the standby unit may affect the output clock depending on the operation performed by the operator. This is because when the operator externally inputs a switching signal to the active unit, asynchronous switching occurs between the active unit and the standby unit because the reference signal for generating a switching timing has stopped.
The present invention has been made in consideration of the above points, and has as its object to provide a clock generation circuit having redundant clock generation units, in which switching from an active unit to a standby unit can be autonomously and synchronously performed.
In order to achieve the above object, according to one aspect of the present invention, in a system in which active and standby units, each used to control a VCXO on the basis of a reference signal from a GPS receiver to generate a high-precision clock, constitute a redundant arrangement, and a clock is output from the active unit, there is provided a clock generating circuit having an arrangement in which when the active unit cannot receive any reference signal from the GPS receiver for some reason, free-running operation is performed in the control state the VCXO assumed when the reference signal stopped in the internal circuit of the active unit, and switching to the standby unit is not immediately performed, and an arrangement in which when the standby unit can normally receive the reference signal from the GPS, the output clock from the active unit during free-running operation is monitored, and the unit that is to receive the reference signal is switched from the active unit to the standby unit at the timing at which no influence is exerted on the output clock when a phase difference larger than a predetermined value is detected between the output clock and the reference signal from the GPS receiver of the standby unit, thereby preventing a clock exceeding the phase difference allowed in the system from being supplied to another circuit.
According to the present invention, a clock exceeding the phase difference allowed in another circuit that uses the clock generated by the clock generation circuit is never supplied. This is because any phase difference between the reference signal from the GPS receiver of the standby unit and the clock generated from the active unit is measured, and the unit from which the reference signal is to be acquired is autonomously switched from the active unit to the standby unit at the timing at which no influence is exerted on the output clock in accordance with a predetermined phase difference smaller than the allowable phase difference.
In addition, according to the present invention, unit replacement can be performed for the maintenance of the active unit or GPS antenna by forcibly switching from the active unit to the standby unit.
The above and many other objects, features and advantages of the present invention will become manifest to those skilled in the art upon making reference to the following detailed description and accompanying drawings in which preferred embodiments incorporating the principle of the present invention are shown by way of illustrative examples.